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  DOI Prefix   10.20431


 

International Journal of Innovative Research in Electronics and Communications
Volume 5, Issue 2, 2018, Page No: 24-48
DOI: http://dx.doi.org/10.20431/2349-4050.0502003


An Approach of Manufacturing of a Voltage References with Increased Density of their Elements. Influence of Miss-Match Induced Stress and Porosity of Materials on Technological Process

E.L. Pankratov

Nizhny Novgorod State University, 23 Gagarin avenue, Nizhny Novgorod, 603950, Russia.

Citation : E.L. Pankratov, An Approach of Manufacturing of a Voltage References with Increased Density of their Elements. Influence of Miss-Match Induced Stress and Porosity of Materials on Technological Process International Journal of Innovative Research in Electronics and Communications 2018, 5(2) : 24-48

Abstract

In this paper we introduce an approach to increase density of field-effect transistors framework a voltage reference. Framework the approach we consider manufacturing the inverter in heterostructure with specific configuration. Several required areas of the heterostructure should be doped by diffusion or ion implantation. After that dopant and radiation defects should by annealed framework optimized scheme. We also consider an approach to decrease value of mismatch-induced stress in the considered heterostructure. We introduce an analytical approach to analyze mass and heat transport in heterostructures during manufacturing of integrated circuits with account mismatch-induced stress.


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